PIC16C54C-04/SO【PDF 126/194 页】IC MCU OTP 512X12 18SOIC

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2002 Microchip Technology Inc.

Preliminary

DS30453D-page 35

PIC16C5X

7.0

I/O PORTS

As with any other register, the I/O Registers can be

written and read under program control. However, read

instructions (e.g., MOVF PORTB,W) always read the I/O

pins independent of the pin’s input/output modes. On

RESET, all I/O ports are defined as input (inputs are at

hi-impedance) since the I/O control registers (TRISA,

TRISB, TRISC) are all set.

7.1

PORTA

PORTA is a 4-bit I/O Register. Only the low order 4 bits

are used (RA<3:0>). Bits 7-4 are unimplemented and

read as '0's.

7.2

PORTB

PORTB is an 8-bit I/O Register (PORTB<7:0>).

7.3

PORTC

PORTC is an 8-bit I/O Register for PIC16C55,

PIC16C57 and PIC16CR57.

PORTC is a General Purpose Register for PIC16C54,

PIC16CR54, PIC16C56, PIC16CR56, PIC16C58 and

PIC16CR58.

7.4

TRIS Registers

The Output Driver Control Registers are loaded with

the contents of the W Register by executing the

TRIS f

instruction. A '1' from a TRIS Register bit puts

the corresponding output driver in a hi-impedance

(input) mode. A '0' puts the contents of the output data

latch on the selected pins, enabling the output buffer.

The TRIS Registers are “write-only” and are set (output

drivers disabled) upon RESET.

7.5

I/O Interfacing

The equivalent circuit for an I/O port pin is shown in

Figure 7-1. All ports may be used for both input and

output operation. For input operations these ports are

non-latching. Any input must be present until read by

an input instruction (e.g., MOVF PORTB, W). The out-

puts are latched and remain unchanged until the output

latch is rewritten. To use a port pin as output, the corre-

sponding direction control bit (in TRISA, TRISB,

TRISC) must be cleared (= 0). For use as an input, the

corresponding TRIS bit must be set. Any I/O pin can be

programmed individually as input or output.

FIGURE 7-1:

EQUIVALENT CIRCUIT

FOR A SINGLE I/O PIN

TABLE 7-1:

SUMMARY OF PORT REGISTERS

Note:

A read of the ports reads the pins, not the

output data latches. That is, if an output

driver on a pin is enabled and driven high,

but the external system is holding it low, a

read of the port will indicate that the pin is

low.

Note 1: I/O pins have protection diodes to VDD and VSS.

Data

Bus

Port

TRIS ‘f’

Data

TRIS

RD Port

VSS

VDD

I/O

pin(1)

Reg

Latch

RESET

Address

Name

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

Value on

Power-On

Reset

Value on

MCLR and

WDT Reset

N/A

TRIS

I/O Control Registers (TRISA, TRISB, TRISC)

1111 1111

05h

PORTA

—

RA3

RA2

RA1

RA0

---- xxxx

---- uuuu

06h

PORTB

RB7

RB6

RB5

RB4

RB3

RB2

RB1

RB0

xxxx xxxx

uuuu uuuu

07h

PORTC

RC7

RC6

RC5

RC4

RC3

RC2

RC1

RC0

xxxx xxxx

uuuu uuuu

Legend: x = unknown, u = unchanged, — = unimplemented, read as '0', Shaded cells = unimplemented, read as ‘0’

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